Delta-sigma modulators have been used in analog-to-digital converters for some time. The reader is referred to the following technical articles incorporated herein by reference.
(1) "A Use of Limit Cycle Oscillators to Obtain Robust Analog to Digital Converters", J. G. Candy, IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. COM-27, No. 3, pp. 298-305, March 1974
(2) "Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator", J. G. Candy, et al., IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. COM-24, No. 11, pp. 1268-1275, November 1976
(3) "A Use of Double Integration in Signal Delta Modulation", J. G. Candy, IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. COM-33, No. 3, pp. 249-258, March 1985
(4) "Circuit and Technology Considerations for MOS Delta-sigma A/D Converters", M. W. Hauser, et al., 1986, IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS, pp. 1310-1315, May 1986
(5) A Low-Noise Chopper-Stabilized Differential Switched-Capacitor Filtering Technique", K.-C. Hsieh, et al., IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-16, No. 6, pp. 708-715, December 1981
In a delta-sigma modulator an analog input signal has a quantized analog signal subtracted therefrom to generate an error signal. This error signal is integrated over time, and the resulting integral is supplied to a quantizer to be digitized. The quantizer includes means for generating the quantized analog signal as well, such as a digital-to-analog converter for the digital signal from the quantizer, completing a direct feedback connection. The delta-sigma modulator is operated at a relatively high sample rate f.sub.s compared to the rate f.sub.out at which an interpolated value of digitized input signal is to be developed as a final output signal of the analog-to-digital converter. The digital output signal from the quantizer of the delta-sigma modulator is then subjected to averaging over cycle of repeated operations of the delta-sigma modulator, f.sub.s /f.sub.out in number. This averaging may be done by accumulating the digital output from the quantizer over (f.sub.s /f.sub.out) operations, then dividing the accumulation by (f.sub.s /f.sub.out) to obtain an interpolated value of the digitized input signal as output signal. This division is a simple matter of binary place shifting when (f.sub.s /f.sub.out) is an integral power of two. This paragraph has described a first-order delta-sigma modulator, with a single integrator included in the direct feedback loop, per the March 1974 J. G. Candy article, being used to implement an oversample and decimate analog to digital converter.
One may view the averaging to obtain the interpolated value of the digitized input signal as being a low-pass digital filtering procedure used to suppress quantizing noise, which is above-band. Low-pass filtering techniques for suppressing quantizing noise that are more sophisticated than the simple accumulate-and-divide technique are known--e.g., from the November 1976 Candy et alii article which describes triangularly weighted kernels for such filtering. With ideal low-pass filtering for suppressing quantizing noise, effectively the number N of bits of resolution in the output signal of the prior-art analog-to-digital converter using a first-order delta-sigma modulator is approximately [1.5 log.sub.2 (f.sub.s /f.sub.out)]-0.9.
In addition to first-order delta-sigma modulators, delta-sigma modulators with additional integrating loops are also possible. This is described in the March 1985 J. G. Candy article.
As pointed out by Hauser et alii, there are many different forms of oversample and decimate analog-to-digital converters, but those of especial interest are the ones where the error signal is forced to have single-bit resolution, inasmuch as this avoids the need for precision binary elements in the digital-to-analog converter used to complete the feedback loop. The goal is to obtain maximum precision in the analog-to-digital process with minimal requirement for precision in the circuit elements employed in the analog-to-digital converter.
Hsieh et alii point out that achievement of this goal is furthered by the use of differential chopper-stabilized configurations, particularly in switched-capacitor designs using metal-oxide-semiconductor field effect transistors (MOSFETs) as switches. Chopper stabilization of the differential amplifier in the integrator also translates its low-frequency, or l/f, noise above-band where it is suppressed by the delta-sigma modulator output signal digital filter. A drawback of the Hsieh et alii analog-to-digital converter is its need for balanced push-pull analog input signals. As noted by Hauser et alii, performance of delta-sigma analog-to-digital converters using MOSFET switches is usually constrained by analog circuit imperfections. One problem is providing sources of differential input signals that are balanced in regard to a fixed common-mode voltage and balanced well.